Thermo-mechanical fatigue of metallizations in microelectronic applications
Research output: Thesis › Doctoral Thesis
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2022.
Research output: Thesis › Doctoral Thesis
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TY - BOOK
T1 - Thermo-mechanical fatigue of metallizations in microelectronic applications
AU - Moser, Sebastian
N1 - no embargo
PY - 2022
Y1 - 2022
N2 - Changing temperatures provoke significant mechanical stress in a microelectronic chip. This is a consequence of a chip generally being composed of materials with different coefficients of thermal expansion: a semiconductor substrate as well as multiple layers of individually structured dielectrics and metallizations. During service, chips in power electronic applications may be subjected to high-power pulses that cause extreme heating conditions. Within a sub-millisecond duration, a temperature raise of a few hundred kelvin is possible corresponding to a heating rate in the order of 10⁶ K/s. It is known that repetitive subjection to such conditions leads to thermo-mechanical fatigue of the integrated metallizations, which represents a serious reliability issue.In the past, different approaches have been utilized to try to emulate aforementioned thermal loading conditions by heating simpler test structures, such as wafer pieces with a metallization on top, rather than active microelectronic chips. By combining such thermal cycling experiments with different intermittent or in-situ characterization methodologies, the thermo-mechanical fatigue behavior as well as the evolution of degradation have been made assessable in a comprehensive manner to identify dominating fatigue modes. With regard to the aim of testing at application-relevant conditions, the heating concepts employed in literature are either strongly restricted in terms of achievable heating rates or the structural design of the metallization to be investigated.This work is dedicated to the development of novel methodologies for the comprehensive assessment of the thermo-mechanical fatigue behavior of a 20-µm-thick copper metallization at conditions relevant to power semiconductor applications. As a means for the replication of such conditions, specifically designed, actively heated test chips referred to as poly-heaters are employed as devices under test and a dedicated setup for their actuation is introduced. Besides actuation, the setup enables the aspect of comprehensive characterization in two ways. First, it provides the possibility to vary individual parameters of the automated stress test comprising (i) the temperature rise and (ii) the duration of a thermal pulse as well as (iii) the repetition frequency of pulsing and (iv) the number of pulses to be applied in total. Second, the setup facilitates in-situ monitoring of the gradual degradation process by means of automated scanning electron microscopy image acquisitions and electrical resistance measurements carried out during the course of a stress test. Through such examinations, the effects of the parameters base temperature and heating rate on the fatigue behavior of the investigated copper metallization are studied. Since early-stage fatigue in terms of interior void formation is hardly detectable from both scanning electron microscopy images and electrical resistance data, a methodology for its quantitative assessment is elaborated. Electropolishing is used in the innovative context of a preparation method removing material along the lateral direction of the metallization and thereby accessing interior degradation features for subsequent characterization. Specifically focusing on the fatigue mode delamination, a novel sensor has been designed and realized onto a poly-heater test chip. In conjunction with the setup introduced, the sensor allows one to monitor the cyclic delamination progress during a thermo-mechanical fatigue experiment by measurements of the delamination sensor resistance.Data obtained employing the methodologies developed within this work and quantifying the thermo-mechanical fatigue behavior of the investigated copper metallization can be utilized to calibrate different material and degradation models. These include thermo-kinetic models, numerical fatigue damage models, and cyclic cohesive zone models that can be used to simulate void formation, crack initiation and propagation, and delamination, respectively.
AB - Changing temperatures provoke significant mechanical stress in a microelectronic chip. This is a consequence of a chip generally being composed of materials with different coefficients of thermal expansion: a semiconductor substrate as well as multiple layers of individually structured dielectrics and metallizations. During service, chips in power electronic applications may be subjected to high-power pulses that cause extreme heating conditions. Within a sub-millisecond duration, a temperature raise of a few hundred kelvin is possible corresponding to a heating rate in the order of 10⁶ K/s. It is known that repetitive subjection to such conditions leads to thermo-mechanical fatigue of the integrated metallizations, which represents a serious reliability issue.In the past, different approaches have been utilized to try to emulate aforementioned thermal loading conditions by heating simpler test structures, such as wafer pieces with a metallization on top, rather than active microelectronic chips. By combining such thermal cycling experiments with different intermittent or in-situ characterization methodologies, the thermo-mechanical fatigue behavior as well as the evolution of degradation have been made assessable in a comprehensive manner to identify dominating fatigue modes. With regard to the aim of testing at application-relevant conditions, the heating concepts employed in literature are either strongly restricted in terms of achievable heating rates or the structural design of the metallization to be investigated.This work is dedicated to the development of novel methodologies for the comprehensive assessment of the thermo-mechanical fatigue behavior of a 20-µm-thick copper metallization at conditions relevant to power semiconductor applications. As a means for the replication of such conditions, specifically designed, actively heated test chips referred to as poly-heaters are employed as devices under test and a dedicated setup for their actuation is introduced. Besides actuation, the setup enables the aspect of comprehensive characterization in two ways. First, it provides the possibility to vary individual parameters of the automated stress test comprising (i) the temperature rise and (ii) the duration of a thermal pulse as well as (iii) the repetition frequency of pulsing and (iv) the number of pulses to be applied in total. Second, the setup facilitates in-situ monitoring of the gradual degradation process by means of automated scanning electron microscopy image acquisitions and electrical resistance measurements carried out during the course of a stress test. Through such examinations, the effects of the parameters base temperature and heating rate on the fatigue behavior of the investigated copper metallization are studied. Since early-stage fatigue in terms of interior void formation is hardly detectable from both scanning electron microscopy images and electrical resistance data, a methodology for its quantitative assessment is elaborated. Electropolishing is used in the innovative context of a preparation method removing material along the lateral direction of the metallization and thereby accessing interior degradation features for subsequent characterization. Specifically focusing on the fatigue mode delamination, a novel sensor has been designed and realized onto a poly-heater test chip. In conjunction with the setup introduced, the sensor allows one to monitor the cyclic delamination progress during a thermo-mechanical fatigue experiment by measurements of the delamination sensor resistance.Data obtained employing the methodologies developed within this work and quantifying the thermo-mechanical fatigue behavior of the investigated copper metallization can be utilized to calibrate different material and degradation models. These include thermo-kinetic models, numerical fatigue damage models, and cyclic cohesive zone models that can be used to simulate void formation, crack initiation and propagation, and delamination, respectively.
KW - thermo-mechanical fatigue
KW - copper metallization
KW - microelectronics
KW - high strain rate
KW - in-situ experiments
KW - delamination sensor
KW - thermo-mechanische Ermüdung
KW - Kupfermetallisierung
KW - Mikroelektronik
KW - hohe Dehnrate
KW - In-situ-Experimente
KW - Delaminationssensor
M3 - Doctoral Thesis
ER -