Microelectronic devices follow the trend of continuous miniaturization and increase of device packing density. This trend is always accompanied with increasing heat fluxes, which prompts the importance of the thermal management within the microelectronic device. An understanding of the device ability to dissipate heat and the thermal issues on its reliability are necessary for continued development. These demands require the knowledge of thermophysical properties of the microelectronic devices and its constituent materials. The microelectronic devices themselves are composed of multiple layers of different materials, whose thicknesses range from millimeters down to nanometers. This broad length scale needs a reflection of the thermal transport, as thermophysical properties of thin films can deviate from their bulk values. In this thesis, experimental investigations were carried out with two metrologies (thermal impedance and time domain thermoreflectance) with their different inherent spatial resolution. The data obtained by these measurements were transferred into a structure function, which maps the heat path in terms of a thermal network. It visualizes the internal temperature distribution of the investigated sample, and hence offers an insight in the internal architecture. Thus, the structure function provided to be a suitable tool for interpretation and identification of changes in the heat path. Within the thesis, it was shown that the structure function is applicable to both metrologies. This allows a novel heat path investigation of the holistic microelectronic system, linking different length scales in heat path from wafer-level up to the whole package.