Material systems in microelectronic devices are often combining many layers of different materials. Increased heating and cooling rates due to higher working frequencies of integrated circuits cause higher loads on the devices. This may lead to delamination of thin films and/or thermo-mechanical fatigue depending on internal stress states. The present work investigates these internal stress and strain states by performing in-situ thermal cycling experiments on a Si-TiW-Cu material stack. The Cu layer experiences significant plastic deformation at higher temperatures (Tmax = 400°C) causing void formation at grain boundaries and the TiW-Cu interface. However, the load is not high enough to cause visible crack growth or delamination, even in pre-notched samples and in samples with a chemically modified TiW interface. The lack of failure can be linked to insufficient internal stresses and strain rates. To improve the workflow a semi-automatic image processing program is successfully implemented. It enables faster and more accurate measurements of the curvature of the Si-TiW interface. An analytical model is proposed to calculate internal elastic and plastic stresses and strains in three layers. A FEA analysis is conducted to validate this model, which can predict the region of plastic deformation in the Cu phase. The presented experimental setup combined with the analytical model promises a greater understanding of fatigue and damage processes in thin film compounds of arbitrary layer count and material composition.